Saturday, August 17, 2013



The TDA8356 is a power circuit for use in 90° and 110° colour deflection systems for field frequencies of 50 to 120 Hz. The circuit provides a DC driven vertical deflection output circuit, operating as a highly efficient class G system.
The vertical driver circuit is a bridge configuration. The deflection coil is connected between the output amplifiers, which are driven in opposite phase. An external resistor (RM) connected in series with the deflection coil provides internal feedback information. The differential input circuit is voltage driven. The input circuit has been adapted to enable it to be used with the TDA9150, TDA9151B, TDA9160A, TDA9162, TDA8366 and TDA8376 which deliver symmetrical current signals. An external resistor (RCON) connected between the differential input determines the output current through the deflection coil.
The relationship between the differential input current and the output current is defined by: Idiff ´ RCON = Icoil ´ RM. The output current is adjustable from 0.5 A (p-p) to 2 A (p-p) by varying RM. The maximum input differential voltage is 1.8 V. In the application it is recommended that Vdiff = 1.5 V (typ). This is recommended because of the spread of input current and the spread in the value of RCON.
The flyback voltage is determined by an additional supply voltage VFB. The principle of operating with two supply voltages (class G) makes it possible to fix the supply voltage VP optimum for the scan voltage and the second supply voltage VFB optimum for the flyback voltage. Using this method, very high efficiency is achieved.

Download Datasheet TDA8356

Friday, July 5, 2013



The REG1117 is a family of easy-to-use three-terminal voltage regulators. The family includes a variety of fixed and adjustable-voltage versions, two currents (800mA and 1A) and two package types (SOT-223 and DDPAK). Output voltage of the adjustable versions is set with two external resistors. The REG1117 low dropout voltage allows its use with as little as 1V input-output voltage differential.
Laser trimming assures excellent output voltage accuracy without adjustment. An NPN output stage allows output stage drive to contribute to the load current for maximum

  • Fixed and Adjustable versions
  • 2.85V model for SCSI-2 active Termination
  • Output Current:
    REG1117: 800mA max
    REG1117A: 1A max
  • Output Tolerance:  1% max
  • Dropout Voltage:
    REG1117: 1.2V max at IO = 800mA
    REG1117A: 1.3V max at IO = 1A
  • Internal Current limit
  • Thermal overload Protection
  • SOT-223 and DDPAK Surface-mount packages
  • SCSI-2 Active Termination
  • Hand-Held Data collection devices
  • High Efficiency Linear Regulators
  • Battery-Powered Instrumentation
  • Battery Management Circuits for Notebook and PALMTOP PCs
  • Core Voltage Supply: FPGA, PLD, DSP, CPU
Pinout Connection
Download Datasheet REG1117

Sunday, June 30, 2013



The CD4066B is a quad bilateral switch intended for the transmission or multiplexing of analog or digital signals. It is pin-for-pin compatible with the CD4016B, but exhibits a much lower on-state resistance. In addition, the on-state resistance is relatively constant over the full signal-input range.
The CD4066B consists of four bilateral switches, each with independent controls. Both the p and the n devices in a given switch are biased on or off simultaneously by the control signal. This configuration eliminates the variation of the switch-transistor threshold voltage with input signal and, thus, keeps the on-state resistance low over the full operating-signal range.
The advantages over single-channel switches include peak input-signal voltage swings equal to the full supply voltage and more constant on-state impedance over the input-signal range. However, for sample-and-hold applications, the CD4016B is recommended.

  • 15-V Digital or ±7.5-V Peak-to-Peak Switching
  • 125-Ω Typical On-State Resistance for 15-V Operation
  • Switch On-State Resistance Matched to Within 5 Ω Over 15-V Signal-Input Range
  • On-State Resistance Flat Over Full Peak-to-Peak Signal Range
  • High On/Off Output-Voltage Ratio: 80 dB Typical at fis = 10 kHz, RL = 1 kΩ
  • High Degree of Linearity: <0.5% Distortion Typical at fis = 1 kHz, Vis = 5 V p-p, VDD − VSS ≥ 10 V, RL = 10 kΩ
  • Extremely Low Off-State Switch Leakage, Resulting in Very Low Offset Current and High Effective Off-State Resistance: 10 pA Typical at VDD − VSS = 10 V, TA = 25°C
  • Extremely High Control Input Impedance (Control Circuit Isolated From Signal Circuit): 1012 Ω Typical
  • Low Crosstalk Between Switches: −50 dB Typical at fis = 8 MHz, RL = 1 kΩ
  • Matched Control-Input to Signal-Output Capacitance: Reduces Output Signal Transients
  • Frequency Response, Switch On = 40 MHz Typical
  • 100% Tested for Quiescent Current at 20 V
  • 5-V, 10-V, and 15-V Parametric Ratings
  • Meets All Requirements of JEDEC Tentative Standard No. 13-B, Standard Specifications for Description of “B” Series CMOS Devices
  • Analog Signal Switching/Multiplexing: Signal Gating, Modulator, Squelch Control, Demodulator, Chopper, Commutating Switch
  • Digital Signal Switching/Multiplexing
  • Transmission-Gate Logic Implementation
  • Analog-to-Digital and Digital-to-Analog Conversion
  • Digital Control of Frequency, Impedance, Phase, and Analog-Signal Gain
Pinout CD4066

 Download Datasheet CD4066B



The JFET-input operational amplifiers in the TL07_ series are designed as low-noise versions of the TL08_ series amplifiers with low input bias and offset currents and fast slew rate. The low harmonic distortion and low noise make the TL07_ series ideally suited for high-fidelity and audio preamplifier applications. Each amplifier features JFET inputs (for high input impedance) coupled with bipolar output stages integrated on a single monolithic chip.
The C-suffix devices are characterized for operation from 0°C to 70°C. The I-suffix devices are characterized for operation from –40°C to 85°C. The M-suffix devices are characterized for operation over the full military temperature range of –55°C to 125°C.

  • Low Power Consumption
  • Wide Common-Mode and Differential Voltage Ranges
  • Low Input Bias and Offset Currents
  • Output Short-Circuit Protection
  • Low Total Harmonic Distortion 0.003% Typ
  • Low Noise Vn = 18 nV//Hz Typ at f = 1 kHz
  • High Input Impedance . . . JFET Input Stage
  • Internal Frequency Compensation
  • Latch-Up-Free Operation
  • High Slew Rate . . . 13 V/ms Typ
  • Common-Mode Input Voltage Range Includes VCC+

Pin Connection
Download Datasheet TL072CP

Saturday, June 29, 2013



TheNE555monolithic timing circuit isa highlystable controller capableofproducingaccuratetime delays or oscillation. In the time delay mode of operation, the time is precisely controlled by one external resistor and capacitor. For astable operation as an oscillator, the free running frequency and the duty cycle are both accurately controlled with two external resistors and one capacitor. The circuit may be triggered and reset on falling waveforms, and the output structure can source or sink up to 200mA. The NE555 is available in plastic and ceramic mini dip package and in a 8-lead micro package and in metal can package version.

  • Low turn OFF time
  • Maximum operating frequency greater han 500kHz
  • Timing from micro seconds to hours
  • Operates in both astable and monostable modes
  • High output current can source or sink 200mA
  • TTL Compatible
  • Temperature stability of 0.0005% PeroC
Pin Connection
 Download Datasheet NE555